Trading firms disable hyperthreading, turn off C-states, pin frequency, isolate cores with isolcpus and pin one thread per core. Explain what each of the five does to the tail latency specifically…

Question

Trading firms disable hyperthreading, turn off C-states, pin frequency, isolate cores with isolcpus and pin one thread per core. Explain what each of the five does to the tail latency specifically, and name the one that costs you the most throughput.

Accepted Answer

Each removes a source of variance rather than lowering the median, and hyperthreading is the one whose removal costs the most throughput. Hyperthreading shares the execution units, L1 and L2 of one physical core between two logical threads, so a sibling running anything steals issue slots and evicts your cache lines; disabling it halves nominal thread count but makes the hot thread's timing depend only on itself. C-states park idle cores in deep sleep, and the wake from C6 costs tens of microseconds, so a core that has been quiet through a slow market answers the first burst late, which is precisely the message that matters. Frequency scaling and turbo mean the clock the code was measured at is not the clock it runs at, and a downclock stretches every cycle count, so pinning frequency makes the budget reproducible. isolcpus keeps the scheduler from placing any other runnable task on the core, removing involuntary context switches. Pinning one thread per core removes migration, which would otherwise cost a cold cache and cold TLB on the new core. Median latency barely moves under all five; the 99.9th percentile and the maximum move by orders of magnitude.